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Data Sheet No. PD60163-T
IR2109(4) (S)
HALF-BRIDGE DRIVER
Features
* Floating channel designed for bootstrap operation * * * * * * * * * *
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Dead Time 600V max. 120 mA / 250 mA 10 - 20V 750 & 200 ns 540 ns
Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V, 5V and 15V input logic compatible Cross-conduction prevention logic Matched propagation delay for both channels High side output in phase with IN input Logic and power ground +/- 5V offset. Internal 540ns dead-time, and programmable up to 5us with one external RDT resistor (IR21094) Lower di/dt gate driver for better noise immunity Shut down input turns off both channels.
(programmable up to 5uS for IR21094)
Packages
14 Lead SOIC
Description
The IR2109(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and 8 Lead SOIC low side referenced output channels. Proprietary HVIC 14 Lead PDIP and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, 8 Lead PDIP down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V VCC
VCC
IN SD
VB HO VS LO
TO LOAD
IN SD COM
up to 600V
IR21094 IR2109
HO V CC IN SD V CC IN SD DT V SS RDT V SS COM LO VB VS TO LOAD
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2109(4) (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO DT VIN VSS dVS/dt PD
Definition
High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Programmable dead-time pin voltage (IR21094 only) Logic input voltage (IN & SD) Logic ground (IR21094/IR21894 only) Allowable offset supply voltage transient Package power dissipation @ T A +25C (8 Lead PDIP) (8 Lead SOIC) (14 lead PDIP) (14 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VSS - 0.3 VCC - 25 -- -- -- -- -- -- -- -- -- -- -50 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300
Units
V
V/ns
W
RthJA
Thermal resistance, junction to ambient
(8 Lead PDIP) (8 Lead SOIC) (14 lead PDIP) (14 lead SOIC)
C/W
TJ TS TL
Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
C
2
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IR2109(4) (S)
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VLO VIN DT VSS TA
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (IN & SD) Programmable dead-time pin voltage (IR21094 only) Logic ground (IR21094 only) Ambient temperature
Min.
VS + 10 Note 1 VS 10 0 VSS VSS -5 -40
Max.
VS + 20 600 VB 20 VCC VCC VCC 5 125
Units
V
C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details).
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25C, DT = VSS unless otherwise specified.
Symbol
ton toff tsd MT tr tf DT MDT
Definition
Turn-on propagation delay Turn-off propagation delay Shut-down propagation delay Delay matching, HS & LS turn-on/off Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching = DTLO - HO - DTHO-LO
Min.
-- -- -- -- -- -- 400 4 -- --
Typ.
750 200 200 0 150 50 540 5 0 0
Max. Units Test Conditions
950 280 280 70 220 80 680 6 60 600 usec nsec nsec VS = 0V VS = 0V RDT= 0 RDT = 200k (IR21094) RDT=0 RDT = 200k (IR21094) VS = 0V VS = 0V or 600V
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3
IR2109(4) (S)
Static Electrical Characteristics
VBIAS (VCC , V BS) = 15V, V SS = COM, DT= VSS and TA = 25C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
VIH VIL VSD,TH+ VSD,THVOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO-
Definition
Logic "1" input voltage for HO & logic "0" for LO Logic "0" input voltage for HO & logic "1" for LO SD input positive going threshold SD input negative going threshold High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input bias current Logic "0" input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed vurrent Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.9 -- 2.9 -- -- -- -- 20 0.4 -- -- 8.0 7.4 0.3 120 250 -- -- -- -- 0.8 0.3 -- 75 1.0 5 -- 8.9 8.2 0.7 200 350 -- 0.8 -- 0.8 1.4 0.6 50 130 1.6 20 2 9.8 9.0 V -- -- -- mA VO = 0V, PW 10 s VO = 15V,PW 10 s A A mA V VCC = 10V to 20V VCC = 10V to 20V VCC = 10V to 20V VCC = 10V to 20V IO = 20 mA IO = 20 mA VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V RDT = 0 IN = 5V, SD = 0V IN = 0V, SD = 5V
4
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IR2109(4) (S)
Functional Block Diagrams
VB
IR2109
IN
VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR
UV DETECT R PULSE FILTER R S Q
HO
VS
DEADTIME UV DETECT
VCC
+5V
LO
SD
VSS/COM LEVEL SHIFT
DELAY
COM
VB
IR21094
IN
VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR PULSE FILTER
UV DETECT R R S Q
HO
VS
DT
+5V
DEADTIME UV DETECT
VCC
LO
SD
VSS/COM LEVEL SHIFT
DELAY
COM
VSS
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5
IR2109(4) (S)
Lead Definitions
Symbol Description
IN SD DT VSS VB HO VS VCC LO COM
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM for IR2109 and VSS for IR21094)
Logic input for shutdown (referenced to COM for IR2109 and VSS for IR21094) Programmable dead-time lead, referenced to VSS. (IR21094 only) Logic Ground (21094 only) High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return
Lead Assignments
1 2 3 4 VCC IN SD COM VB HO VS LO
8
7 6 5
1 2 3 4
VCC IN SD COM
VB HO VS LO
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IR2109
IR2109S
1 2 3 4 5 6 7
VCC IN SD DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
1 2 3 4 5 6 7
VCC IN SD DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
14 Lead PDIP
14 Lead SOIC
IR21094
6
IR21094S
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IR2109(4) (S)
IN
IN(LO)
50% 50%
SD
IN(HO)
ton tr 90% toff 90% tf
HO LO
LO HO
Figure 1. Input/Output Timing Diagram
10%
10%
Figure 2. Switching Time Waveform Definitions
SD
50% IN
50%
50%
tsd
90%
HO LO
90%
HO LO
DT LO-HO
10% DTHO-LO
90%
Figure 3. Shutdown Waveform Definitions
10% MDT= DTLO-HO - DTHO-LO
IN (LO)
50% 50%
Figure 4. Deadtime Waveform Definitions
IN (HO)
LO
HO
10%
MT 90%
MT
LO
HO
Figure 5. Delay Matching Waveform Definitions
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IR2109(4) (S)
1300
1300
Turn-on Propagation Delay (ns)
Turn-on Propagation Delay (ns)
1100
1100 M ax.
900
M ax
900 Typ.
700
Typ.
700
500 50
500 25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature
( oC)
V BIAS Supply Voltage (V)
Figure 6B. Turn-on Propagation Delay vs. Supply Voltage
Figure 6A. Turn-on Propagation Delay vs. Temperature
500
500
Turn-off Propagation Delay (ns)
Turn-off Propagation Delay (ns)
400
400
M ax. 300 Typ. 200
300 M ax. 200 Typ. 100
100
0 50 25 0 25 50
o
0 75 100 125 10 12 14 16 18 20
Temperature ( C)
Figure 7A. Turn-off Propagation Delay vs. Temperature
V BIAS Supply Voltage (V)
Figure 7B. Turn-off Propagation Delay vs. Supply Voltage
8
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IR2109(4) (S)
500
500
SD Propagation Delay (ns)
400
SD Propagation Delay (ns)
400 M ax. 300 Typ. 200
300 M ax. 200 Typ. 100
100
0 50 25 0 25 50 75 100 125
0 10 12 14 16 18 20
Temperature (oC)
Figure 8A. SD Propagation Delay vs. Temperature
V BIAS Supply Voltage (V)
Figure 8B. SD Propagation Delay vs. Supply Voltage
500
500
Turn-on Rise Time (ns)
Turn-on Rise Time (ns)
400
400
300
300 M ax. Typ.
200
200
M ax. Typ.
100
100
0 50 25 0 25 50 75 100 125
0 10 12 14 16 18 20
Temperature (oC)
Figure 9A. Turn-on Rise Time vs. Temperature
V BIAS Supply Voltage (V)
Figure 9B. Turn-on Rise Time vs. Supply Voltage
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IR2109(4) (S)
200
200
Turn-off Fall Time (ns)
Turn-off Fall Time (ns)
150
150
100 M ax. 50 Typ. 0 50 25 0 25 50 75 100 125
100
M ax.
Typ. 50
0 10 12 14 16 18 20
Temperature ( oC)
Figure 10A. Turn-off Fall Time vs. Temperature
V BIAS Supply Voltage (V)
Figure 10B. Turn-off Fall Time vs. Supply Voltage
1000
1000
800 M ax. 600 Typ. Mi n.
800
Deadtime (ns)
Deadtime (ns)
M ax.
600
Typ.
Mi n. 400
400
200 50 25 0 25 50 75 100 125
200 10 12 14 16 18 20
Temperature ( oC)
V BIAS Supply Voltage (V)
Figure 11B. Deadtime vs. Supply Voltage
Figure 11A. Deadtime vs. Temperature
10
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IR2109(4) (S)
7
5
Logic "1" Input Voltage (V)
6 M ax. 5
4 M ax. 3
Deadtime ( s)
Typ. 4 3 2 1 0 0 50 100 150 200 Mi n.
2
1
0 50 25 0 25 50
o
75
100
125
RDT (K)
Figure 11C. Deadtime vs. RDT (IR21094 only)
Temperature ( C)
Figure 12A. Logic "1" Input Voltage vs. Temperature
5
5
Logic "0" Input Voltage (V)
Logic "1" Input Voltage (V)
4 M ax. 3
4
3
2
2
1
1
Mi n.
0 10 12 14 16 18 20
0 50 25 0 25 50
o
75
100
125
V CC Supply Voltage (V)
Figure 12B. Logic "1" Input Voltage vs. Supply Voltage
Temperature ( C)
Figure 13A. Logic "0" Input Voltage vs. Temperature
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11
IR2109(4) (S)
5
5
4
SD Positive Going Threshold (V)
Logic "0" Input Voltage (V)
4
3
3
M ax.
2
2
1
Mi n.
1
0 10 12 14 16 18 20
0 50 25 0 25 50
o
75
100
125
V CC Supply Voltage (V)
Figure 13B. Logic "0" Input Current vs. Supply Voltage
Temperature ( C)
Figure 14A. SD Positive Going Threshold vs. Temperature
5
5
SD Negative Going Threshold (V)
SD Positive Going Threshold (V)
4
4
3
M ax.
3
2
2
1
1
Mi n.
0 10 12 14 16 18 20
0 -50 -25 0 25 50 75 100 125
V CC Supply Voltage (V)
Figure 14B. SD Positive Going Threshold vs. Supply Voltage
Temperature (oC)
Figure 15A. SD Negative Going Threshold vs. Temperature
12
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IR2109(4) (S)
5
4
SD Negative Going Threshold (V)
4
High Level Output Voltage (V)
12 14 16 18 20
3
3
2
2
M ax. 1 Typ.
1
Mi n.
0 10
0 50 25 0 25 50
o
75
100
125
V CC Supply Voltage (V)
Figure 15B. SD Negative Going Threshold vs. Supply Voltage
Temperature ( C)
Figure 16A. High Level Output Voltage vs. Temperature
4
1. 5
High Level Output Voltage (V)
Low Level Output Voltage (V)
1. 2
3
0. 9
2
M ax.
0. 6 M ax. 0. 3 Typ. 0
Typ. 1
0 10 12 14 16 18 20
-50
-25
0
25
50
75
100
125
V BIAS Supply Voltage (V)
Figure 16B. High Level Output Voltage vs. Supply Voltage
Temperature (oC)
Figure 17A. Low Level Output Voltage vs. Temperature
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13
IR2109(4) (S)
Offset Supply Leakage Current ( A)
1. 5
500
Low Level Output Voltage (V)
1. 2
400
0. 9 M ax. 0. 6 Typ. 0. 3
300
200
100 M ax. 0 50 25 0 25 50
o
0 10 12 14 16 18 20
75
100
125
V BIAS Supply Voltage (V)
Figure 17B. Low Level Output Voltage vs. Supply Voltage
Temperature ( C)
Figure 18A. Offset Supply Leakage Current vs. Temperature
O ffs e t S u p p l L e a ka g e C u rre n t ( y
A)
500
400
400
S u p p l C u rre n t ( A ) y
300
300
200
200
M ax. 100 Typ. Mi n.
M ax.
V
0 50
100
0 0 100 200 300 400 500 600
BS
25
0
25
50
75
100
125
V B B o o s t V o l g e (V ) ta
T e m p e ra tu re (oC )
igure 18B. Offset Supply Leakage Current vs. Boost Voltage
Figure 19A. VBS Supply Current vs. Temperature
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IR2109(4) (S)
400
3. 0
V BS S u p pl C u rre nt ( A ) y
300
V c c S u p pl C urre nt (m A ) y
2. 5
2. 0 M ax. 1. 5 Typ. 1. 0 Mi n. 0. 5
200
M ax. Typ. Mi n. 0 10 12 14 16 18 20
100
0. 0 50 25 0 25 50 75 100 125
V BS S up p l V o l ge (V ) y ta
Figure 19B. VBS Supply Current vs. Supply Voltage
T em p e ra tu re (oC )
Figure 20A. VCC Supply Current vs. Temperature
3. 0
60
Logic "1" Input Current ( A)
V CC Supply Current (mA)
2. 5
50
2. 0
40
1. 5 M ax. 1. 0 Typ. 0. 5 Mi n. 0. 0 10 12 14 16 18 20
30
20 M ax. Typ. 0 50
10
25
0
25
50
75
100
125
V CC Supply Voltage (V)
Temperature (oC)
i
Figure 20B. VCC Supply Current vs. VCC Supply Voltage
21
i
1
C
Figure 21A. Logic "1" Input Current vs. Temperature
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15
IR2109(4) (S)
60
5
Logic "1" Input Current ( A)
50
Logic "0" Input Current ( A)
12 14 16 18 20
4
40
3 M ax. 2
30 M ax. 20
10 Typ. 0 10
1
0 -50 -25 0 25 50
o
75
100
125
V CC Supply Voltage (V)
Figure 21B. Logic "1" Input Current vs. Supply Voltage
Temperature ( C)
Figure 22A. Logic "0" Input Current vs. Temperature
5
12
V CC UVLO Threshold (+) (V)
Logic "0" Input Current ( A)
4
11
3 M ax. 2
10
M ax.
9
Typ.
Mi n. 8
1
0 10 12 14 16 18 20
7 50 25 0 25 50
o
75
100
125
V CC Supply Voltage (V)
Figure 22B. Logic "0" Input Currentt vs. Supply Voltage
Temperature ( C)
Figure 23. VCC Undervoltage Threshold (+) vs. Temperature
16
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IR2109(4) (S)
11
12
V CC UVLO Threshold (-) (V)
V BS UVLO Threshold (+) (V)
0 25 50 75 100 125
10 M ax. 9 Typ. 8 Mi n. 7
11
10
M ax.
Typ. 9
Mi n. 8
6 50 25
7 50 25 0 25 50
o
75
100
125
Temperature ( oC)
Figure 24. VCC Undervoltage Threshold (-) vs. Temperature
Temperature ( C)
Figure 25. VBS Undervoltage Threshold (+) vs. Temperature
11
500
V BS UVLO Threshold (-) (V)
Output Source Current ( A)
10
400
M ax. 9 Typ. 8 Mi n. 7
300 Typ. 200 Mi n. 100
6 50 25 0 25 50
o
0 75 100 125 50 25 0 25 50
o
75
100
125
Temperature ( C)
Figure 26. VBS Undervoltage Threshold (-) vs. Temperature
Temperature ( C)
Figure 27A. Output Source Current vs. Temperature
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17
IR2109(4) (S)
500
600
Output Source Current ( A)
400
Output Sink Current ( A)
500 Typ. 400 Mi n. 300
300
200 Typ. 100 Mi n. 0 10 12 14 16 18 20
200
100
0 50 25 0 25 50
o
75
100
125
V BIAS Supply Voltage (V)
Temperature ( C)
Figure 27B. Output Source Current vs. Supply Voltage
Figure 28A. Output Sink Current vs. Temperature
600
0
Output Sink Current ( A)
500
V S Offset Supply Voltage (V)
2 Typ. 4
400
300 Typ. 200 Mi n. 100
6
8
0 10 12 14 16 18 20
10 10 12 14 16 18 20
V BIAS Supply Voltage (V)
V BS Flouting Supply Voltage (V)
Figure 28B. Output Sink Currentt vs. Supply Voltage
Figure 29. Maximum VS Negative Offset vs. Supply Voltage
18
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IR2109(4) (S)
140 120 100 80 60 40 20 1 10 100 1000 Frequency (KHz)
Figure 30. IR2109 vs Frequency (IRFBC20) Rgate = 33, VCC = 15V
140V 70V 0V
140 120 Temperature (oC) 100
140V
Temprature (oC)
80
70V
60 40 20 1 10 100
0V
1000
Frequency (KHz)
Figure 31. IR2109 vs Frequency (IRFBC30) Rgate = 22, VCC = 15V
140 120 Temperature (oC) 100
140V
140 120 Temperature (oC) 100 80 60 40 20 1 10 100 1000 1 10 100
140V 70V
0V
80 60 40 20 Frequency (KHz)
70V 0V
1000
Frequency (KHz)
Figure 32. IR2109 vs Frequency (IRFBC40) Rgate = 15, VCC = 15V
Figure 33. IR2109 vs Frequency (IRFPE50) Rgate = 10, VCC = 15V
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IR2109(4) (S)
140 120 Temperature (oC)
o Temperature ( C)
140 120 100 80
140V
100 80 60 40
0V 140V 70V
60
70V
40 20 1 10 100 1000 1 10 100
0V
20 Frequency (KHz)
Figure 34. IR21094 vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
1000
Frequency (KHz)
Figure 35. IR21094 vs. Frequency (IRFBC30), Rgate=22 , V CC=15V
140 120 Temperature (oC) 100
140V
140 120 Temperature (o C) 100 80 60 40 20
140V
70V
0V
80 60 40 20 1 10 100
70V 0V
1000
1
10
100
1000
Frequency (KHz)
Figure 36. IR21094 vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
Frequency (KHz)
Figure 37. IR21094 vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
20
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IR2109(4) (S)
140 120 Temperature (oC)
Temperature (oC)
140 120
140V
100 80 60 40 20 1 10 100 1000 Frequency (KHz)
Figure 38. IR2109S vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
140V 70V 0V
100 80 60 40 20 1 10 100
70V 0V
1000
Frequency (KHz)
Figure 39. IR2109S vs. Frequency (IRFBC30), Rgate=22 , V CC=15V
140 120 Temperature (o C)
140V 70V
140 120 Tempreture (oC)
140V 70V 0V
0V
100 80 60 40 20 1 10 100 1000 Frequency (KHz)
100 80 60 40 20 1 10 100 1000 Frequency (KHz)
Figure 40. IR2109S vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
Figure 41. IR2109S vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
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21
IR2109(4) (S)
140 120 Temperature (oC) Temperature (oC) 100 80 60 40 20 1 10 100 1000 Frequency (KHz)
Figure 42. IR21094S vs. Frequency (IRFBC20), Rgate=33 , V CC=15V
140V 70V 0V
140 120 100 80 60
0V 140V 70V
40 20 1 10 100 1000 Frequency (KHz)
Figure 43. IR21094S vs. Frequency (IRFBC30), Rgate=22 , V CC=15V
140 Temperature (oC) Temperature (oC) 120 100 80 60 40 20 1 10 100 1000 Frequency (KHz)
Figure 44. IR21094S vs. Frequency (IRFBC40), Rgate=15 , V CC=15V
140V 70V 0V
140 120 100 80 60 40 20 1 10 100
140V 70V 0V
1000
Frequency (KHz)
Figure 45. IR21094S vs. Frequency (IRFPE50), Rgate=10 , V CC=15V
22
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IR2109(4) (S)
Case Outlines
8 Lead PDIP
01-6014 01-3003 01 (MS-001AB)
D A 5
B
FOOTPRINT 8X 0.72 [.028]
DIM A b c D
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
E
6.46 [.255]
1
2
3
4
e e1 H K L
8X 1.78 [.070]
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1
3X 1.27 [.050]
y
A C 0.10 [.004] y
K x 45
8X b 0.25 [.010]
NOTES:
A1 CAB
8X L 7
8X c
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INC HES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENG TH OF LEAD FOR SOLDERING TO A SUBSTRATE.
8 Lead SOIC
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01-6027 01-0021 11 (MS-012AA)
23
IR2109(4) (S)
14 Lead PDIP
01-6010 01-3002 03 (MS-001AC)
14 Lead SOIC (narrow body)
01-6019 01-3063 00 (MS-012AB)
Data and specifications subject to change without notice. 7/11/2003
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